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author | Arnd Bergmann <arnd@arndb.de> | 2017-06-29 16:58:33 +0200 |
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committer | Arnd Bergmann <arnd@arndb.de> | 2017-06-29 16:58:33 +0200 |
commit | 1964babb2659a2939e7737550eb511609ae7d6c5 (patch) | |
tree | 4999d37bd46e0b64d067c2ba600113836ce1d98e /init/do_mounts.h | |
parent | Merge tag 'socfpga_dts_for_v4.13' of git://git.kernel.org/pub/scm/linux/kerne... (diff) | |
parent | ARM: dts: meson: use the real ethernet clock on Meson8 and Meson8b (diff) | |
download | linux-1964babb2659a2939e7737550eb511609ae7d6c5.tar.xz linux-1964babb2659a2939e7737550eb511609ae7d6c5.zip |
Merge tag 'amlogic-dt-2' of git://git.kernel.org/pub/scm/linux/kernel/git/khilman/linux-amlogic into next/dt
Merge "Amlogic 32-bit DT changes for v4.13 (round 2)" from Kevin Hilman:
- greatly expands DT clock support for meson8b
* tag 'amlogic-dt-2' of git://git.kernel.org/pub/scm/linux/kernel/git/khilman/linux-amlogic: (22 commits)
ARM: dts: meson: use the real ethernet clock on Meson8 and Meson8b
ARM: dts: meson8b: add the SCU device node
ARM: dts: meson: add USB support on Meson8 and Meson8b
ARM: dts: meson: add the hardware random number generator
ARM: dts: meson8: add reserved memory zones
ARM: dts: meson: add the SAR ADC
ARM: dts: meson8: add the pins for the SDIO controller
ARM: dts: meson8: add the PWM_E and PWM_F pins
ARM: dts: meson: use GIC_SPI and IRQ_TYPE_EDGE_RISING macros
ARM: dts: meson: use C preprocessor friendly include syntax
ARM: dts: meson8: fix the IR receiver pins
clk: meson8b: export the ethernet gate clock
clk: meson8b: export the USB clocks
clk: meson8b: export the gate clock for the HW random number generator
clk: meson8b: export the SDIO clock
clk: meson8b: export the SAR ADC clocks
clk: meson-gxbb: un-export the CPU clock
clk: meson-gxbb: expose UART clocks
clk: meson-gxbb: expose SPICC gate
clk: meson-gxbb: expose spdif master clock
...
Diffstat (limited to 'init/do_mounts.h')
0 files changed, 0 insertions, 0 deletions