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| author | Will Deacon <will@kernel.org> | 2020-01-10 15:51:59 +0100 |
|---|---|---|
| committer | Will Deacon <will@kernel.org> | 2020-01-10 16:52:25 +0100 |
| commit | ac4b80e5b9d0ecf906300d79e4dc4df5526579a8 (patch) | |
| tree | 276ac7bad2eec3350d49069c549eabc364e8b0b3 /init | |
| parent | iommu/arm-smmu: Rename public #defines under ARM_SMMU_ namespace (diff) | |
| download | linux-ac4b80e5b9d0ecf906300d79e4dc4df5526579a8.tar.xz linux-ac4b80e5b9d0ecf906300d79e4dc4df5526579a8.zip | |
iommu/io-pgtable-arm: Rationalise VTCR handling
Commit 05a648cd2dd7 ("iommu/io-pgtable-arm: Rationalise TCR handling")
reworked the way in which the TCR register value is returned from the
io-pgtable code when targetting the Arm long-descriptor format, in
preparation for allowing page-tables to target TTBR1.
As it turns out, the new interface is a lot nicer to use, so do the same
conversion for the VTCR register even though there is only a single base
register for stage-2 translation.
Cc: Robin Murphy <robin.murphy@arm.com>
Signed-off-by: Will Deacon <will@kernel.org>
Diffstat (limited to 'init')
0 files changed, 0 insertions, 0 deletions