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authorSimon Horman <horms+renesas@verge.net.au>2018-01-17 17:17:11 +0100
committerSimon Horman <horms+renesas@verge.net.au>2018-02-12 13:50:57 +0100
commitbff8f8c2feb7898e5dcdf451678041a1477cc9a2 (patch)
tree392658ccaac626b23b1d5188ed35adf22d0362e1 /init
parentARM: dts: r8a7793: consistently use single space after = (diff)
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ARM: dts: r8a7793: add soc node
Add soc node to represent the bus and move all nodes with a base address into this node. This is consistent with handling of R-Car Gen3, RZ/G1, and R-Car V2H (R8A77920) SoCs upstream. It is intended to migrate other R-Car Gen2 SoCs to this scheme. The ordering is derived from simply moving each node with an address up to before any nodes without a base address that occur before the soc node. To improve maintainability follow-up patches will sort subnodes of both the new soc node and the root node. This patch should not introduce any functional change. Signed-off-by: Simon Horman <horms+renesas@verge.net.au> Reviewed-by: Niklas Söderlund <niklas.soderlund+renesas@ragnatech.se> Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
Diffstat (limited to 'init')
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