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author | Shengjiu Wang <shengjiu.wang@nxp.com> | 2023-05-05 09:55:22 +0200 |
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committer | Mark Brown <broonie@kernel.org> | 2023-05-08 01:48:53 +0200 |
commit | 3e4a826129980fed0e3e746a7822f2f204dfc24a (patch) | |
tree | 9da7a1e787731b8eaec00f7111fb8a0f6e3296f3 /io_uring | |
parent | ASoC: codecs: wcd938x: Remove unneeded semicolon (diff) | |
download | linux-3e4a826129980fed0e3e746a7822f2f204dfc24a.tar.xz linux-3e4a826129980fed0e3e746a7822f2f204dfc24a.zip |
ASoC: fsl_sai: MCLK bind with TX/RX enable bit
On i.MX8MP, the sai MCLK is bound with TX/RX enable bit,
which means the TX/RE enable bit need to be enabled then
MCLK can be output on PAD.
Some codec (for example: WM8962) needs the MCLK output
earlier, otherwise there will be issue for codec
configuration.
Add new soc data "mclk_with_tere" for this platform and
enable the MCLK output in startup stage.
As "mclk_with_tere" only applied to i.MX8MP, currently
The soc data is shared with i.MX8MN, so need to add
an i.MX8MN own soc data with "mclk_with_tere" disabled.
Signed-off-by: Shengjiu Wang <shengjiu.wang@nxp.com
Link: https://lore.kernel.org/r/1683273322-2525-1-git-send-email-shengjiu.wang@nxp.com
Signed-off-by: Mark Brown <broonie@kernel.org
Diffstat (limited to 'io_uring')
0 files changed, 0 insertions, 0 deletions