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authorAndy Shevchenko <andriy.shevchenko@linux.intel.com>2018-08-30 18:52:52 +0200
committerLee Jones <lee.jones@linaro.org>2018-10-23 09:58:34 +0200
commit9f8ddee1dab836ca758ca8fc555ab5a3aaa5d3fd (patch)
tree33b4938f3b2b195a80db74bb4a88bbaafd893974 /ipc/compat.c
parentmfd: intel_soc_pmic_crc: Use REGMAP_IRQ_REG() macro (diff)
downloadlinux-9f8ddee1dab836ca758ca8fc555ab5a3aaa5d3fd.tar.xz
linux-9f8ddee1dab836ca758ca8fc555ab5a3aaa5d3fd.zip
mfd: intel_soc_pmic_bxtwc: Chain power button IRQs as well
Power button IRQ actually has a second level of interrupts to distinguish between UI and POWER buttons. Moreover, current implementation looks awkward in approach to handle second level IRQs by first level related IRQ chip. To address above issues, split power button IRQ to be chained as well. Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com> Reviewed-by: Mika Westerberg <mika.westerberg@linux.intel.com> Signed-off-by: Lee Jones <lee.jones@linaro.org>
Diffstat (limited to 'ipc/compat.c')
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