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| author | Florian Fainelli <f.fainelli@gmail.com> | 2016-02-09 21:55:52 +0100 |
|---|---|---|
| committer | Ralf Baechle <ralf@linux-mips.org> | 2016-05-13 15:30:25 +0200 |
| commit | 2e274768e4dd9565a31cd1979ed6d534cd4e656f (patch) | |
| tree | d1546998deecaf65fa480acdbb20823642f0f18d /ipc/util.c | |
| parent | MIPS: Allow RIXI to be used on non-R2 or R6 cores (diff) | |
| download | linux-2e274768e4dd9565a31cd1979ed6d534cd4e656f.tar.xz linux-2e274768e4dd9565a31cd1979ed6d534cd4e656f.zip | |
MIPS: Move RIXI exception enabling after vendor-specific cpu_probe
Some processors may not have the RIXI bit advertised in the Config3 register,
not being a MIPS32R2 or R6 core, yet, they might be supporting it through a
different way, which is overriden during vendor-specific cpu_probe().
Move the RIXI exceptions enabling after the vendor-specific cpu_probe()
function has had a change to run and override the current CPU's options with
MIPS_CPU_RIXI.
Signed-off-by: Florian Fainelli <f.fainelli@gmail.com>
Cc: john@phrozen.org
Cc: cernekee@gmail.com
Cc: jon.fraser@broadcom.com
Cc: pgynther@google.com
Cc: paul.burton@imgtec.com
Cc: ddaney.cavm@gmail.com
Cc: linux-mips@linux-mips.org
Patchwork: https://patchwork.linux-mips.org/patch/12506/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
Diffstat (limited to 'ipc/util.c')
0 files changed, 0 insertions, 0 deletions