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| author | Douglas Anderson <dianders@chromium.org> | 2016-09-02 05:26:23 +0200 |
|---|---|---|
| committer | Heiko Stuebner <heiko@sntech.de> | 2016-09-04 23:45:50 +0200 |
| commit | 29edeccb4445123a0457a308d3ff67ddd0e34f97 (patch) | |
| tree | 0a1df37fd41d192d6b3ad1fc9542a6bfc127ab90 /ipc | |
| parent | clk: rockchip: add 2016M to big cpu clk rate table on rk3399 (diff) | |
| download | linux-29edeccb4445123a0457a308d3ff67ddd0e34f97.tar.xz linux-29edeccb4445123a0457a308d3ff67ddd0e34f97.zip | |
clk: rockchip: drop CLK_SET_RATE_PARENT from rk3399 fractional dividers
Currently the fractional divider clock time can't handle the
CLK_SET_RATE_PARENT flag. This is because, unlike normal dividers,
there is no clk_divider_bestdiv() function to try speeding up the parent
to see if it helps things.
Eventually someone could try to figure out how to make fractional
dividers able to use CLK_SET_RATE_PARENT, but until they do let's not
confuse the common clock framework (and anyone using it) by setting the
flag.
Signed-off-by: Douglas Anderson <dianders@chromium.org>
Signed-off-by: Chris Zhong <zyw@rock-chips.com>
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
Diffstat (limited to 'ipc')
0 files changed, 0 insertions, 0 deletions