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| author | Pierre Gondois <pierre.gondois@arm.com> | 2023-04-14 10:14:50 +0200 |
|---|---|---|
| committer | Sudeep Holla <sudeep.holla@arm.com> | 2023-04-14 11:13:38 +0200 |
| commit | cde0fbff07eff7e4e0e85fa053fe19a24c86b1e0 (patch) | |
| tree | 2a3d2f3fd9f480c3755d967e57d978c5cb870a31 /kernel/audit.h | |
| parent | cacheinfo: Check sib_leaf in cache_leaves_are_shared() (diff) | |
| download | linux-cde0fbff07eff7e4e0e85fa053fe19a24c86b1e0.tar.xz linux-cde0fbff07eff7e4e0e85fa053fe19a24c86b1e0.zip | |
cacheinfo: Check cache properties are present in DT
If a Device Tree (DT) is used, the presence of cache properties is
assumed. Not finding any is not considered. For arm64 platforms,
cache information can be fetched from the clidr_el1 register.
Checking whether cache information is available in the DT
allows to switch to using clidr_el1.
init_of_cache_level()
\-of_count_cache_leaves()
will assume there a 2 cache leaves (L1 data/instruction caches), which
can be different from clidr_el1 information.
cache_setup_of_node() tries to read cache properties in the DT.
If there are none, this is considered a success. Knowing no
information was available would allow to switch to using clidr_el1.
Fixes: de0df442ee49 ("cacheinfo: Check 'cache-unified' property to count cache leaves")
Reported-by: Alexandre Ghiti <alexghiti@rivosinc.com>
Link: https://lore.kernel.org/all/20230404-hatred-swimmer-6fecdf33b57a@spud/
Signed-off-by: Pierre Gondois <pierre.gondois@arm.com>
Reviewed-by: Conor Dooley <conor.dooley@microchip.com>
Link: https://lore.kernel.org/r/20230414081453.244787-3-pierre.gondois@arm.com
Signed-off-by: Sudeep Holla <sudeep.holla@arm.com>
Diffstat (limited to 'kernel/audit.h')
0 files changed, 0 insertions, 0 deletions