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| author | Lucas Stach <dev@lynxeye.de> | 2016-02-29 21:46:06 +0100 |
|---|---|---|
| committer | Thierry Reding <treding@nvidia.com> | 2016-04-28 12:41:51 +0200 |
| commit | a02cc84a31d3bd46a10546ff7024e7b5a186d339 (patch) | |
| tree | cf51407240888a2c212593cd89541e97ba88a014 /kernel/cgroup.c | |
| parent | clk: tegra: Fix pllre Tegra210 and add pll_re_out1 (diff) | |
| download | linux-a02cc84a31d3bd46a10546ff7024e7b5a186d339.tar.xz linux-a02cc84a31d3bd46a10546ff7024e7b5a186d339.zip | |
clk: tegra: Initialize PLL_C to sane rate on Tegra30
If the bootloader does not touch PLL_C it will stay in its reset state,
failing to lock when enabled. This leads to consumers of this clock to
fail probing. Fix this by always programming the PLL with a sane rate,
which allows it to lock, at startup.
Signed-off-by: Lucas Stach <dev@lynxeye.de>
Signed-off-by: Thierry Reding <treding@nvidia.com>
Diffstat (limited to 'kernel/cgroup.c')
0 files changed, 0 insertions, 0 deletions