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| author | Claudiu Beznea <claudiu.beznea@microchip.com> | 2020-07-22 09:38:13 +0200 |
|---|---|---|
| committer | Stephen Boyd <sboyd@kernel.org> | 2020-07-24 11:18:47 +0200 |
| commit | 390227dca870cd0b8b0961da9e293551015c0007 (patch) | |
| tree | de8343016b397fb64726093a993ae35a80a056a1 /kernel/freezer.c | |
| parent | clk: at91: sam9x60-pll: use logical or for range check (diff) | |
| download | linux-390227dca870cd0b8b0961da9e293551015c0007.tar.xz linux-390227dca870cd0b8b0961da9e293551015c0007.zip | |
clk: at91: sam9x60-pll: check fcore against ranges
According to datasheet the range of 600-1200MHz is for the
frequency generated by the fractional part of the PLL (namely
Fcorepllck according to datasheet). With this in mind the output
range of the PLL itself (fractional + div), taking into account
that the divider is 8 bits wide, is 600/256-1200Hz=2.3-1200MHz.
Fixes: a436c2a447e59 ("clk: at91: add sam9x60 PLL driver")
Signed-off-by: Claudiu Beznea <claudiu.beznea@microchip.com>
Link: https://lore.kernel.org/r/1595403506-8209-6-git-send-email-claudiu.beznea@microchip.com
Signed-off-by: Stephen Boyd <sboyd@kernel.org>
Diffstat (limited to 'kernel/freezer.c')
0 files changed, 0 insertions, 0 deletions