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authorMarc Zyngier <marc.zyngier@arm.com>2018-03-09 15:59:40 +0100
committerMarc Zyngier <marc.zyngier@arm.com>2018-03-26 11:54:23 +0200
commit67b5b673ad4d469186edddecfe59909a9fd4b643 (patch)
tree0fa4a9317d42a103930ef436963256d312ad5935 /kernel/irq/ipi.c
parentarm64: KVM: Use SMCCC_ARCH_WORKAROUND_1 for Falkor BP hardening (diff)
downloadlinux-67b5b673ad4d469186edddecfe59909a9fd4b643.tar.xz
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KVM: arm/arm64: vgic: Disallow Active+Pending for level interrupts
It was recently reported that VFIO mediated devices, and anything that VFIO exposes as level interrupts, do no strictly follow the expected logic of such interrupts as it only lowers the input line when the guest has EOId the interrupt at the GIC level, rather than when it Acked the interrupt at the device level. THe GIC's Active+Pending state is fundamentally incompatible with this behaviour, as it prevents KVM from observing the EOI, and in turn results in VFIO never dropping the line. This results in an interrupt storm in the guest, which it really never expected. As we cannot really change VFIO to follow the strict rules of level signalling, let's forbid the A+P state altogether, as it is in the end only an optimization. It ensures that we will transition via an invalid state, which we can use to notify VFIO of the EOI. Reviewed-by: Eric Auger <eric.auger@redhat.com> Tested-by: Eric Auger <eric.auger@redhat.com> Tested-by: Shunyong Yang <shunyong.yang@hxt-semitech.com> Signed-off-by: Marc Zyngier <marc.zyngier@arm.com>
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