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authorThomas Gleixner <tglx@linutronix.de>2016-09-14 20:53:26 +0200
committerThomas Gleixner <tglx@linutronix.de>2016-09-14 20:53:26 +0200
commit16217dc79dbc599b110dda26d0421df47904bba4 (patch)
tree98df3c18b14284b8a6f8b04de12e0b7dde5a55fa /kernel/irq/msi.c
parentgenirq: Expose interrupt information through sysfs (diff)
parentirqchip/gicv3-its: Use MADT ITS subtable to do PCI/MSI domain initialization (diff)
downloadlinux-16217dc79dbc599b110dda26d0421df47904bba4.tar.xz
linux-16217dc79dbc599b110dda26d0421df47904bba4.zip
Merge tag 'irqchip-4.9-1' of git://git.kernel.org/pub/scm/linux/kernel/git/maz/arm-platforms into irq/core
Merge the first drop of irqchip updates for 4.9 from Marc Zyngier: - ACPI IORT core code - IORT support for the GICv3 ITS - A few of GIC cleanups
Diffstat (limited to 'kernel/irq/msi.c')
-rw-r--r--kernel/irq/msi.c11
1 files changed, 11 insertions, 0 deletions
diff --git a/kernel/irq/msi.c b/kernel/irq/msi.c
index 54999350162c..19e9dfbe97fa 100644
--- a/kernel/irq/msi.c
+++ b/kernel/irq/msi.c
@@ -359,6 +359,17 @@ int msi_domain_alloc_irqs(struct irq_domain *domain, struct device *dev,
else
dev_dbg(dev, "irq [%d-%d] for MSI\n",
virq, virq + desc->nvec_used - 1);
+ /*
+ * This flag is set by the PCI layer as we need to activate
+ * the MSI entries before the PCI layer enables MSI in the
+ * card. Otherwise the card latches a random msi message.
+ */
+ if (info->flags & MSI_FLAG_ACTIVATE_EARLY) {
+ struct irq_data *irq_data;
+
+ irq_data = irq_domain_get_irq_data(domain, desc->irq);
+ irq_domain_activate_irq(irq_data);
+ }
}
return 0;