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authorThomas Gleixner <tglx@linutronix.de>2020-01-24 20:08:51 +0100
committerThomas Gleixner <tglx@linutronix.de>2020-01-24 20:08:51 +0100
commit43ee74487bd2842cb4d37b5c62f074fbed2366b9 (patch)
treea1af19c05682a520fac5691c6f2885f8d28394ca /kernel/irq
parentgenirq, sched/isolation: Isolate from handling managed interrupts (diff)
parentirqchip/gic-v4.1: Allow direct invalidation of VLPIs (diff)
downloadlinux-43ee74487bd2842cb4d37b5c62f074fbed2366b9.tar.xz
linux-43ee74487bd2842cb4d37b5c62f074fbed2366b9.zip
Merge tag 'irqchip-5.6' of git://git.kernel.org/pub/scm/linux/kernel/git/maz/arm-platforms into irq/core
Pull irqchip updates from Marc Zyngier: - Conversion of the SiFive PLIC to hierarchical domains - New SiFive GPIO irqchip driver - New Aspeed SCI irqchip driver - New NXP INTMUX irqchip driver - Additional support for the Meson A1 GPIO irqchip - First part of the GICv4.1 support - Assorted fixes
Diffstat (limited to 'kernel/irq')
-rw-r--r--kernel/irq/irqdomain.c18
1 files changed, 18 insertions, 0 deletions
diff --git a/kernel/irq/irqdomain.c b/kernel/irq/irqdomain.c
index dd822fd8a7d5..7527e5ef6fe5 100644
--- a/kernel/irq/irqdomain.c
+++ b/kernel/irq/irqdomain.c
@@ -987,6 +987,23 @@ const struct irq_domain_ops irq_domain_simple_ops = {
EXPORT_SYMBOL_GPL(irq_domain_simple_ops);
/**
+ * irq_domain_translate_onecell() - Generic translate for direct one cell
+ * bindings
+ */
+int irq_domain_translate_onecell(struct irq_domain *d,
+ struct irq_fwspec *fwspec,
+ unsigned long *out_hwirq,
+ unsigned int *out_type)
+{
+ if (WARN_ON(fwspec->param_count < 1))
+ return -EINVAL;
+ *out_hwirq = fwspec->param[0];
+ *out_type = IRQ_TYPE_NONE;
+ return 0;
+}
+EXPORT_SYMBOL_GPL(irq_domain_translate_onecell);
+
+/**
* irq_domain_translate_twocell() - Generic translate for direct two cell
* bindings
*
@@ -1459,6 +1476,7 @@ int irq_domain_push_irq(struct irq_domain *domain, int virq, void *arg)
if (rv) {
/* Restore the original irq_data. */
*root_irq_data = *child_irq_data;
+ kfree(child_irq_data);
goto error;
}