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| author | Marc Zyngier <marc.zyngier@arm.com> | 2019-04-09 17:26:21 +0200 |
|---|---|---|
| committer | Will Deacon <will@kernel.org> | 2019-10-08 13:25:25 +0200 |
| commit | 93916beb70143c46bf1d2bacf814be3a124b253b (patch) | |
| tree | b77b4aee5aedd2b7875ca36a1e35b374035fcede /kernel/latencytop.c | |
| parent | arm64: KVM: Trap VM ops when ARM64_WORKAROUND_CAVIUM_TX2_219_TVM is set (diff) | |
| download | linux-93916beb70143c46bf1d2bacf814be3a124b253b.tar.xz linux-93916beb70143c46bf1d2bacf814be3a124b253b.zip | |
arm64: Enable workaround for Cavium TX2 erratum 219 when running SMT
It appears that the only case where we need to apply the TX2_219_TVM
mitigation is when the core is in SMT mode. So let's condition the
enabling on detecting a CPU whose MPIDR_EL1.Aff0 is non-zero.
Cc: <stable@vger.kernel.org>
Signed-off-by: Marc Zyngier <marc.zyngier@arm.com>
Signed-off-by: Will Deacon <will@kernel.org>
Diffstat (limited to 'kernel/latencytop.c')
0 files changed, 0 insertions, 0 deletions