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authorMuralidhara M K <muralidhara.mk@amd.com>2023-01-27 18:04:10 +0100
committerBorislav Petkov (AMD) <bp@alien8.de>2023-03-24 13:03:20 +0100
commitb29dad9bf3ce13e7a37f7fc75ee2c95ac48b9f08 (patch)
tree6b6980e32fd5f8d8e61533fe671987e75ffbb0f7 /kernel/latencytop.c
parentEDAC/amd64: Split prep_chip_selects() into dct/umc functions (diff)
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EDAC/amd64: Split read_base_mask() into dct/umc functions
Call them from their respective hw_info_get() paths. Call the new functions after the setting the chip select base and mask counts, since those are need to read the correct number of chip select base and mask registers. And call the new functions before the remaining set up, because the base and mask register values will be needed later. [Yazen: Rebased/reworked patch and reworded commit message. ] Signed-off-by: Muralidhara M K <muralidhara.mk@amd.com> Co-developed-by: Naveen Krishna Chatradhi <naveenkrishna.chatradhi@amd.com> Signed-off-by: Naveen Krishna Chatradhi <naveenkrishna.chatradhi@amd.com> Co-developed-by: Yazen Ghannam <yazen.ghannam@amd.com> Signed-off-by: Yazen Ghannam <yazen.ghannam@amd.com> Signed-off-by: Borislav Petkov (AMD) <bp@alien8.de> Link: https://lore.kernel.org/r/20230127170419.1824692-14-yazen.ghannam@amd.com
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