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author | Kevin Cernekee <cernekee@gmail.com> | 2010-10-16 23:22:38 +0200 |
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committer | Ralf Baechle <ralf@linux-mips.org> | 2010-10-29 20:08:53 +0200 |
commit | 18d693b3598fdebdd5c65a613221793456a7ce45 (patch) | |
tree | bdec7d15eb2ba774292358b2a617965ab3ff4530 /kernel/sched_rt.c | |
parent | MIPS: Honor L2 bypass bit (diff) | |
download | linux-18d693b3598fdebdd5c65a613221793456a7ce45.tar.xz linux-18d693b3598fdebdd5c65a613221793456a7ce45.zip |
MIPS: Allow UserLocal on MIPS_R1 processors
Some MIPS32R1 processors implement UserLocal (RDHWR $29) to accelerate
programs that make extensive use of thread-local storage. Therefore,
setting up the HWRENA register should not depend on cpu_has_mips_r2.
Signed-off-by: Kevin Cernekee <cernekee@gmail.com>
Cc: linux-mips@linux-mips.org
Cc: linux-kernel@vger.kernel.org
Diffstat (limited to 'kernel/sched_rt.c')
0 files changed, 0 insertions, 0 deletions