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authorKevin Cernekee <cernekee@gmail.com>2010-10-16 23:22:38 +0200
committerRalf Baechle <ralf@linux-mips.org>2010-10-29 20:08:53 +0200
commit18d693b3598fdebdd5c65a613221793456a7ce45 (patch)
treebdec7d15eb2ba774292358b2a617965ab3ff4530 /kernel/sched_rt.c
parentMIPS: Honor L2 bypass bit (diff)
downloadlinux-18d693b3598fdebdd5c65a613221793456a7ce45.tar.xz
linux-18d693b3598fdebdd5c65a613221793456a7ce45.zip
MIPS: Allow UserLocal on MIPS_R1 processors
Some MIPS32R1 processors implement UserLocal (RDHWR $29) to accelerate programs that make extensive use of thread-local storage. Therefore, setting up the HWRENA register should not depend on cpu_has_mips_r2. Signed-off-by: Kevin Cernekee <cernekee@gmail.com> Cc: linux-mips@linux-mips.org Cc: linux-kernel@vger.kernel.org
Diffstat (limited to 'kernel/sched_rt.c')
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