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authorLinus Torvalds <torvalds@linux-foundation.org>2018-01-04 01:41:07 +0100
committerLinus Torvalds <torvalds@linux-foundation.org>2018-01-04 01:41:07 +0100
commit00a5ae218d57741088068799b810416ac249a9ce (patch)
treee4def71f5558377de6f536e96524fe808b2d378e /kernel/time/posix-cpu-timers.c
parentMerge branch 'for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/ebi... (diff)
parentx86/process: Define cpu_tss_rw in same section as declaration (diff)
downloadlinux-00a5ae218d57741088068799b810416ac249a9ce.tar.xz
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Merge branch 'x86-pti-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/tip/tip
Pull x86 page table isolation fixes from Thomas Gleixner: "A couple of urgent fixes for PTI: - Fix a PTE mismatch between user and kernel visible mapping of the cpu entry area (differs vs. the GLB bit) and causes a TLB mismatch MCE on older AMD K8 machines - Fix the misplaced CR3 switch in the SYSCALL compat entry code which causes access to unmapped kernel memory resulting in double faults. - Fix the section mismatch of the cpu_tss_rw percpu storage caused by using a different mechanism for declaration and definition. - Two fixes for dumpstack which help to decode entry stack issues better - Enable PTI by default in Kconfig. We should have done that earlier, but it slipped through the cracks. - Exclude AMD from the PTI enforcement. Not necessarily a fix, but if AMD is so confident that they are not affected, then we should not burden users with the overhead" * 'x86-pti-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/tip/tip: x86/process: Define cpu_tss_rw in same section as declaration x86/pti: Switch to kernel CR3 at early in entry_SYSCALL_compat() x86/dumpstack: Print registers for first stack frame x86/dumpstack: Fix partial register dumps x86/pti: Make sure the user/kernel PTEs match x86/cpu, x86/pti: Do not enable PTI on AMD processors x86/pti: Enable PTI by default
Diffstat (limited to 'kernel/time/posix-cpu-timers.c')
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