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| author | Takeshi Kihara <takeshi.kihara.df@renesas.com> | 2018-02-26 16:30:11 +0100 |
|---|---|---|
| committer | Geert Uytterhoeven <geert+renesas@glider.be> | 2018-02-28 09:17:54 +0100 |
| commit | a8ab4f2bd8a5298679dabe16910322625a0df247 (patch) | |
| tree | 532f5ea77346ace6609072775ec2827a157ababf /lib/bust_spinlocks.c | |
| parent | pinctrl: sh-pfc: r8a77995: Add VIN4 pins, groups and function (diff) | |
| download | linux-a8ab4f2bd8a5298679dabe16910322625a0df247.tar.xz linux-a8ab4f2bd8a5298679dabe16910322625a0df247.zip | |
pinctrl: sh-pfc: r8a77965: Add support for INTC-EX IRQ pins
Most pins on the R8A77965 SoC can be configured in GPIO mode for
interrupt and GPIO functionality, while a couple of them can also
be routed to the INTC-EX hardware block (formerly known as IRQC).
On R8A77965 the INTC-EX hardware handles pins IRQ0 -> IRQ5 and
this patch adds support for them to the PFC driver as "intc_ex_irqN".
Based on a similar patch for the R8A7795 PFC driver by Magnus Damm
<damm+renesas@opensource.se>.
Signed-off-by: Takeshi Kihara <takeshi.kihara.df@renesas.com>
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Diffstat (limited to 'lib/bust_spinlocks.c')
0 files changed, 0 insertions, 0 deletions