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authorGupta Pekon <pekon@ti.com>2013-05-31 14:01:30 +0200
committerTony Lindgren <tony@atomide.com>2013-06-12 18:54:28 +0200
commitf34f37160c2960a763ed05d1e13b2ea75a48d0fb (patch)
tree62afbbc1a3b12c9d7ec4fb346d98da6732fb41b2 /lib/cordic.c
parentARM: dts: OMAP2+: Simplify NAND support (diff)
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ARM: OMAP2+: gpmc: get number of useable GPMC chip-selects via DT
This patch enables usage of DT property 'gpmc,num-cs' as already documented in Documentation/devicetree/bindings/bus/ti-gpmc.txt Though GPMC hardware supports upto 8 chip-selects, but all chip-selects may not be available for use because: - chip-select pin may not be bonded out at SoC device boundary. - chip-select pin-mux may conflict with other pins usage. - board level constrains. gpmc,num-cs allows user to configure maximum number of GPMC chip-selects available for use on any given platform. This ensures: - GPMC child nodes having chip-selects within allowed range are only probed. - And un-used GPMC chip-selects remain blocked.(may be for security reasons). Signed-off-by: Gupta, Pekon <pekon@ti.com> Signed-off-by: Tony Lindgren <tony@atomide.com>
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