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authorAxel Lin <axel.lin@gmail.com>2012-03-22 23:27:10 +0100
committerMark Brown <broonie@opensource.wolfsonmicro.com>2012-03-26 19:35:35 +0200
commit9300928692f835f76f5604b3b51c3085977edf68 (patch)
tree293d6acf7b14b978677fe9f3c41c76a2d0bafd85 /lib/dec_and_lock.c
parentregulator: Fix restoring pmic.dcdcx_hib_mode settings in wm8350_dcdc_set_susp... (diff)
downloadlinux-9300928692f835f76f5604b3b51c3085977edf68.tar.xz
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regulator: Do proper shift to set correct bit for DC[2|5]_HIB_MODE setting
DC[2|5]_HIB_MODE is BIT 12 of DCDC[2|5] Control register. WM8350_DC2_HIB_MODE_ACTIVE/WM8350_DC2_HIB_MODE_DISABLE are defined as 1/0. Thus we need to left shift WM8350_DC2_HIB_MODE_SHIFT bits. Signed-off-by: Axel Lin <axel.lin@gmail.com> Signed-off-by: Mark Brown <broonie@opensource.wolfsonmicro.com>
Diffstat (limited to 'lib/dec_and_lock.c')
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