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author | Maurice Petallo <mauricex.r.petallo@intel.com> | 2014-07-08 13:11:01 +0200 |
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committer | Ulf Hansson <ulf.hansson@linaro.org> | 2014-07-10 14:58:29 +0200 |
commit | f25c33724d1512a72554c0ad4cb70b43ba15374e (patch) | |
tree | 05aef5afbddc4d01c5facc90246293864f44e4dc /lib/div64.c | |
parent | mmc: sdhci: Preset value not supported in Baytrail eMMC (diff) | |
download | linux-f25c33724d1512a72554c0ad4cb70b43ba15374e.tar.xz linux-f25c33724d1512a72554c0ad4cb70b43ba15374e.zip |
mmc: sdhci: add DDR50 1.8V mode support for BayTrail eMMC Controller
This is to enable DDR50 bus speed mode with 1.8V signaling capability
for BayTrail ACPI and PCI mode eMMC Controller.
Signed-off-by: Maurice Petallo <mauricex.r.petallo@intel.com>
Acked-by: Adrian Hunter <adrian.hunter@intel.com>
Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
Diffstat (limited to 'lib/div64.c')
0 files changed, 0 insertions, 0 deletions