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authorDong Aisheng <aisheng.dong@nxp.com>2016-07-12 09:46:13 +0200
committerUlf Hansson <ulf.hansson@linaro.org>2016-07-25 10:34:53 +0200
commitcc17e1294b8aeb3596485b3b8a68419cf3f6ab69 (patch)
treebb7a752266482d7f3249b556467523b5b7e24058 /lib/find_bit.c
parentmmc: sdhci-esdhc-imx: add esdhc specific suspend resume callback (diff)
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mmc: sdhci-esdhc-imx: restore watermark level setting after resume
Currently, we config the watermark_level register only in probe. This will cause the mmc write operation timeout issue after system resume back in LPSR mode. Because in LPSR mode, after system resume back, the watermark_level register(0x44) changes to 0x08000880, which set the write watermark level as 0, and set the read watermark level as 128. This value is incorrect. This patch restores the setting of watermark level register after system resume back. Signed-off-by: Dong Aisheng <aisheng.dong@nxp.com> Acked-by: Adrian Hunter <adrian.hunter@intel.com> Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
Diffstat (limited to 'lib/find_bit.c')
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