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authorJan Beulich <JBeulich@novell.com>2011-02-23 11:08:10 +0100
committerJesse Barnes <jbarnes@virtuousgeek.org>2011-05-21 18:00:35 +0200
commita3170c1f924ce2565c4e160b9b095e65c03b2dc6 (patch)
tree70a3bd84066921f0c1c454f205f6031fa5f97a72 /lib/locking-selftest-spin-softirq.h
parentPCI: add latency tolerance reporting enable/disable support (diff)
downloadlinux-a3170c1f924ce2565c4e160b9b095e65c03b2dc6.tar.xz
linux-a3170c1f924ce2565c4e160b9b095e65c03b2dc6.zip
x86/PCI: derive pcibios_last_bus from ACPI MCFG
On various newer Intel systems the PCI bus(ses) the non-core devices live on aren't getting announced by ACPI except through the bus range covered by mmconfig. At least the i7core-edac driver depends on these devices getting detected. Mauro, could you check whether with this change the Xeon 55xx hack in that driver can go away altogether, and with it the bogus exporting of pcibios_scan_specific_bus()? Signed-off-by: Jan Beulich <jbeulich@novell.com> Cc: Mauro Carvalho Chehab <mchehab@redhat.com> Cc: Aristeu Sergio <arozansk@redhat.com> Signed-off-by: Jesse Barnes <jbarnes@virtuousgeek.org>
Diffstat (limited to 'lib/locking-selftest-spin-softirq.h')
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