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authorArd Biesheuvel <ard.biesheuvel@linaro.org>2017-07-13 19:16:00 +0200
committerCatalin Marinas <catalin.marinas@arm.com>2017-08-09 19:51:57 +0200
commit35129dde88afad07f54b332d4f9eda2d254b80f2 (patch)
tree9d9d78d7f3534ac9806ae3189b0273e05be77916 /lib/raid6/Makefile
parentMerge tag 'arm64-iort-for-v4.14' of git://git.kernel.org/pub/scm/linux/kernel... (diff)
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md/raid6: use faster multiplication for ARM NEON delta syndrome
The P/Q left side optimization in the delta syndrome simply involves repeatedly multiplying a value by polynomial 'x' in GF(2^8). Given that 'x * x * x * x' equals 'x^4' even in the polynomial world, we can accelerate this substantially by performing up to 4 such operations at once, using the NEON instructions for polynomial multiplication. Results on a Cortex-A57 running in 64-bit mode: Before: ------- raid6: neonx1 xor() 1680 MB/s raid6: neonx2 xor() 2286 MB/s raid6: neonx4 xor() 3162 MB/s raid6: neonx8 xor() 3389 MB/s After: ------ raid6: neonx1 xor() 2281 MB/s raid6: neonx2 xor() 3362 MB/s raid6: neonx4 xor() 3787 MB/s raid6: neonx8 xor() 4239 MB/s While we're at it, simplify MASK() by using a signed shift rather than a vector compare involving a temp register. Signed-off-by: Ard Biesheuvel <ard.biesheuvel@linaro.org> Signed-off-by: Catalin Marinas <catalin.marinas@arm.com>
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