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author | Thor Thayer <tthayer@opensource.altera.com> | 2016-03-31 20:48:01 +0200 |
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committer | Borislav Petkov <bp@suse.de> | 2016-04-02 13:27:06 +0200 |
commit | e17ced2cb61ac63efb5ab54fee8e45aaa437c874 (patch) | |
tree | d455899bef346ede94b3f0114daa6309f64269a7 /lib/test_hexdump.c | |
parent | ARM: socfpga: Enable Arria10 L2 cache ECC on startup (diff) | |
download | linux-e17ced2cb61ac63efb5ab54fee8e45aaa437c874.tar.xz linux-e17ced2cb61ac63efb5ab54fee8e45aaa437c874.zip |
EDAC, altera: Extract error inject operations to a struct fops
In preparation for the Arria10 peripheral ECCs, extract the inject file
operations because the Arria10 IRQ trigger mechanism is different than
Cyclone5/Arria5 and Arria10 L2 cache.
Signed-off-by: Thor Thayer <tthayer@opensource.altera.com>
Cc: devicetree@vger.kernel.org
Cc: dinguyen@opensource.altera.com
Cc: linux-arm-kernel@lists.infradead.org
Cc: linux@arm.linux.org.uk
Cc: linux-edac <linux-edac@vger.kernel.org>
Link: http://lkml.kernel.org/r/1459450087-24792-2-git-send-email-tthayer@opensource.altera.com
Signed-off-by: Borislav Petkov <bp@suse.de>
Diffstat (limited to 'lib/test_hexdump.c')
0 files changed, 0 insertions, 0 deletions