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| author | Catalin Marinas <catalin.marinas@arm.com> | 2017-04-07 18:04:19 +0200 |
|---|---|---|
| committer | Catalin Marinas <catalin.marinas@arm.com> | 2017-04-07 18:04:19 +0200 |
| commit | a5a3237e508e51fb63373ceafa0b45651cacbc55 (patch) | |
| tree | 19bcd8e9d4450ee3370c524fdebe1180ad2a0f91 /lib/test_rhashtable.c | |
| parent | arm64: print a fault message when attempting to write RO memory (diff) | |
| parent | arm64: cpu_errata: Add capability to advertise Cortex-A73 erratum 858921 (diff) | |
| download | linux-a5a3237e508e51fb63373ceafa0b45651cacbc55.tar.xz linux-a5a3237e508e51fb63373ceafa0b45651cacbc55.zip | |
Merge tag 'arch-timer-errata-prereq' of git://git.kernel.org/pub/scm/linux/kernel/git/maz/arm-platforms into for-next/core
Pre-requisites for the arch timer errata workarounds:
- Allow checking of a CPU-local erratum
- Add CNTVCT_EL0 trap handler
- Define Cortex-A73 MIDR
- Allow an erratum to be match for all revisions of a core
- Add capability to advertise Cortex-A73 erratum 858921
* tag 'arch-timer-errata-prereq' of git://git.kernel.org/pub/scm/linux/kernel/git/maz/arm-platforms:
arm64: cpu_errata: Add capability to advertise Cortex-A73 erratum 858921
arm64: cpu_errata: Allow an erratum to be match for all revisions of a core
arm64: Define Cortex-A73 MIDR
arm64: Add CNTVCT_EL0 trap handler
arm64: Allow checking of a CPU-local erratum
Diffstat (limited to 'lib/test_rhashtable.c')
0 files changed, 0 insertions, 0 deletions