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authorPeter Ujfalusi <peter.ujfalusi@ti.com>2016-12-23 10:21:10 +0100
committerMark Brown <broonie@kernel.org>2016-12-31 19:43:11 +0100
commit63c3194b82530bd71fd49db84eb7ab656b8d404a (patch)
treec21e4e4467dc29598477b248a2aecdb5374174e0 /lib
parentMerge remote-tracking branches 'asoc/topic/wm9712', 'asoc/topic/wm9713' and '... (diff)
downloadlinux-63c3194b82530bd71fd49db84eb7ab656b8d404a.tar.xz
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ASoC: tlv320aic3x: Mark the RESET register as volatile
The RESET register only have one self clearing bit and it should not be cached. If it is cached, when we sync the registers back to the chip we will initiate a software reset as well, which is not desirable. Signed-off-by: Peter Ujfalusi <peter.ujfalusi@ti.com> Reviewed-by: Jarkko Nikula <jarkko.nikula@bitmer.com> Signed-off-by: Mark Brown <broonie@kernel.org>
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