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authorWill Deacon <will.deacon@arm.com>2018-10-05 14:28:57 +0200
committerWill Deacon <will.deacon@arm.com>2018-11-21 14:16:33 +0100
commitcf7175ece01741317e1ea07609d0ec0dcbc9c31a (patch)
tree0b1924c056718da93e946eefd51d95bae1a12a89 /mm/mempolicy.c
parentarm64: perf: Add support for Armv8.1 PMCEID register format (diff)
downloadlinux-cf7175ece01741317e1ea07609d0ec0dcbc9c31a.tar.xz
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arm64: perf: Remove duplicate generic cache events
We cannot distinguish reads from writes in our generic cache events, so drop the WRITE entries and leave the READ entries pointing to the combined read/write events, as is done by other CPUs and architectures. Reported-by: Ganapatrao Kulkarni <Ganapatrao.Kulkarni@cavium.com> Signed-off-by: Will Deacon <will.deacon@arm.com>
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