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authorCaesar Wang <wxt@rock-chips.com>2015-10-23 13:25:27 +0200
committerEduardo Valentin <edubezval@gmail.com>2015-11-03 18:57:42 +0100
commit7e38a5b1daa12cbaace3c76402999a84460df3e2 (patch)
tree285decd6f8385bdde8830cac152b7c196248b4a1 /mm
parentdt-bindings: rockchip-thermal: Add the pinctrl states in this document (diff)
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thermal: rockchip: support the sleep pinctrl state to avoid glitches in s2r
When we come out of system suspend state (S3) the tsadc will have been reset and back at its default state. While reprogramming the tsadc it's possible that we'll glitch the output and unintentionally cause the "over temperature" GPIO to be asserted. Since the over temperature GPIO is often hooked up to something that will cause a reboot or shutdown in hardware, this glitch can be catastrophic on some boards. We'll add support for selecting the "sleep" pinctrl state at suspend time. Boards can use this to effectively disable the tsadc at suspend time and avoid glitches when the system is resumed. Reviewed-by: Douglas Anderson <dianders@chromium.org> Signed-off-by: Caesar Wang <wxt@rock-chips.com> Signed-off-by: Eduardo Valentin <edubezval@gmail.com>
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