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authorNathan Huckleberry <nhuck@google.com>2022-05-20 20:14:59 +0200
committerHerbert Xu <herbert@gondor.apana.org.au>2022-06-10 10:40:17 +0200
commit34f7f6c3011276313383099156be287ac745bcea (patch)
tree54cceaf783df3b379afd1b6c52a699c5ed8301c4 /net/atm/signaling.c
parentcrypto: arm64/aes-xctr - Improve readability of XCTR and CTR modes (diff)
downloadlinux-34f7f6c3011276313383099156be287ac745bcea.tar.xz
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crypto: x86/polyval - Add PCLMULQDQ accelerated implementation of POLYVAL
Add hardware accelerated version of POLYVAL for x86-64 CPUs with PCLMULQDQ support. This implementation is accelerated using PCLMULQDQ instructions to perform the finite field computations. For added efficiency, 8 blocks of the message are processed simultaneously by precomputing the first 8 powers of the key. Schoolbook multiplication is used instead of Karatsuba multiplication because it was found to be slightly faster on x86-64 machines. Montgomery reduction must be used instead of Barrett reduction due to the difference in modulus between POLYVAL's field and other finite fields. More information on POLYVAL can be found in the HCTR2 paper: "Length-preserving encryption with HCTR2": https://eprint.iacr.org/2021/1441.pdf Signed-off-by: Nathan Huckleberry <nhuck@google.com> Reviewed-by: Ard Biesheuvel <ardb@kernel.org> Reviewed-by: Eric Biggers <ebiggers@google.com> Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au>
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