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author | Will Deacon <will.deacon@arm.com> | 2015-03-06 12:54:08 +0100 |
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committer | Will Deacon <will.deacon@arm.com> | 2015-03-24 16:09:47 +0100 |
commit | 71bbf038eaa44a80dd6df0da7c708d4618172fe0 (patch) | |
tree | 254618379bbb6b6efc4de039eee350e0ec2a86f9 /net/caif/caif_socket.c | |
parent | arm64: head.S: ensure visibility of page tables (diff) | |
download | linux-71bbf038eaa44a80dd6df0da7c708d4618172fe0.tar.xz linux-71bbf038eaa44a80dd6df0da7c708d4618172fe0.zip |
dt: pmu: extend ARM PMU binding to allow for explicit interrupt affinity
The current ARM PMU binding relies on the PMU interrupts being listed in
CPU logical order, which the device-tree author simply cannot know
anything about.
This patch introduces a new "interrupt-affinity" property, which makes
the relationship between the PMU interrupts and their corresponding
CPU explicit.
Acked-by: Mark Rutland <mark.rutland@arm.com>
Signed-off-by: Will Deacon <will.deacon@arm.com>
Diffstat (limited to 'net/caif/caif_socket.c')
0 files changed, 0 insertions, 0 deletions