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authorPrakash, Prashanth <pprakash@codeaurora.org>2016-02-17 21:21:02 +0100
committerRafael J. Wysocki <rafael.j.wysocki@intel.com>2016-03-09 23:35:29 +0100
commitbeee23aebc6650609ef1547f6d813fa5065f74aa (patch)
tree3bb482e066420463ade606addde900101738f18b /net/ipv6/mcast.c
parentmailbox: pcc: optimized pcc_send_data (diff)
downloadlinux-beee23aebc6650609ef1547f6d813fa5065f74aa.tar.xz
linux-beee23aebc6650609ef1547f6d813fa5065f74aa.zip
ACPI / CPPC: replace writeX/readX to PCC with relaxed version
We do not have a strict read/write order requirement while accessing PCC subspace. The only requirement is all access should be committed before triggering the PCC doorbell to transfer the ownership of PCC to the platform and this requirement is enforced by the PCC driver. Profiling on a many core system shows improvement of about 1.8us on average per freq change request(about 10% improvement on average). Since these operations are executed while holding the pcc_lock, reducing this time helps the CPPC implementation to scale much better as the number of cores increases. Signed-off-by: Prashanth Prakash <pprakash@codeaurora.org> Acked-by: Ashwin Chaugule <ashwin.chaugule@linaro.org> Signed-off-by: Rafael J. Wysocki <rafael.j.wysocki@intel.com>
Diffstat (limited to 'net/ipv6/mcast.c')
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