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author | Paul Burton <paul.burton@imgtec.com> | 2016-08-19 19:07:15 +0200 |
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committer | Thomas Gleixner <tglx@linutronix.de> | 2016-08-22 18:37:51 +0200 |
commit | 2564970a381651865364974ea414384b569cb9c0 (patch) | |
tree | 4bfbdd4a519afcf1712dd025cd5041ae085314d5 /net/mac80211/rx.c | |
parent | irqchip/mips-gic: Cleanup chip and handler setup (diff) | |
download | linux-2564970a381651865364974ea414384b569cb9c0.tar.xz linux-2564970a381651865364974ea414384b569cb9c0.zip |
irqchip/mips-gic: Implement activate op for device domain
If an IRQ is setup using __setup_irq(), which is used by the
request_irq() family of functions, and we are using an SMP kernel then
the affinity of the IRQ will be set via setup_affinity() immediately
after the IRQ is enabled. This call to gic_set_affinity() will lead to
the interrupt being mapped to a VPE. However there are other ways to use
IRQs which don't cause affinity to be set, for example if it is used to
chain to another IRQ controller with irq_set_chained_handler_and_data().
The irq_set_chained_handler_and_data() code path will enable the IRQ,
but will not trigger a call to gic_set_affinity() and in this case
nothing will map the interrupt to a VPE, meaning that the interrupt is
never received.
Fix this by implementing the activate operation for the GIC device IRQ
domain, using gic_shared_irq_domain_map() to map the interrupt to the
correct pin of cpu 0.
Fixes: c98c1822ee13 ("irqchip/mips-gic: Add device hierarchy domain")
Signed-off-by: Paul Burton <paul.burton@imgtec.com>
Cc: linux-mips@linux-mips.org
Cc: Jason Cooper <jason@lakedaemon.net>
Cc: Marc Zyngier <marc.zyngier@arm.com>
Cc: stable@vger.kernel.org
Link: http://lkml.kernel.org/r/20160819170715.27820-2-paul.burton@imgtec.com
Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
Diffstat (limited to 'net/mac80211/rx.c')
0 files changed, 0 insertions, 0 deletions