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authorAlexander Duyck <alexander.h.duyck@intel.com>2012-04-19 19:48:48 +0200
committerJeff Kirsher <jeffrey.t.kirsher@intel.com>2012-05-04 12:25:24 +0200
commit041441d0f0d885619d48f8f7682825ace523cf59 (patch)
treec1ddc6cb296a46862093138aa1ada4c2cf8f0d0d /net/sched/sch_teql.c
parentixgbe: Reorder link flow control functions in ixgbe_common.c (diff)
downloadlinux-041441d0f0d885619d48f8f7682825ace523cf59.tar.xz
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ixgbe: Update link flow control to correctly handle multiple packet buffer DCB
This change updates the link flow control configuration so that we correctly set the link flow control settings for DCB. Previously we would have to call the fc_enable call 8 times, once for each packet buffer. If we move that logic into the fc_enable call itself we can avoid multiple unnecessary register writes. This change also corrects an issue in which we were only shifting the water marks for 82599 parts by 6 instead of 10. This was resulting in us only using 1/16 of the packet buffer when flow control was enabled. Signed-off-by: Alexander Duyck <alexander.h.duyck@intel.com> Tested-by: Ross Brattain <ross.b.brattain@intel.com> Signed-off-by: Jeff Kirsher <jeffrey.t.kirsher@intel.com>
Diffstat (limited to 'net/sched/sch_teql.c')
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