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authorMasahiro Yamada <yamada.masahiro@socionext.com>2017-10-13 14:54:46 +0200
committerStephen Boyd <sboyd@codeaurora.org>2017-10-24 10:57:24 +0200
commitdb9d79f6e7de3e059d897234f93cbe1e55a0ed50 (patch)
treedbc0de52d0bc6ad461f3a294374bbcda06c5faa8 /net/sctp/protocol.c
parentclk: samsung: exynos4: Enable VPLL and EPLL clocks for suspend/resume cycle (diff)
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clk: uniphier: fix clock data for PXs3
Fix reg offsets of USB clocks. Fixes: 736de651a836 ("clk: uniphier: add PXs3 clock data") Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com> Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>
Diffstat (limited to 'net/sctp/protocol.c')
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