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authorHeiner Kallweit <hkallweit1@gmail.com>2020-09-27 19:44:29 +0200
committerDavid S. Miller <davem@davemloft.net>2020-09-27 22:37:30 +0200
commit709a16be0593c08190982cfbdca6df95e6d5823b (patch)
tree048ac7e769ae3de399722f92ddab51ed1db3bc32 /net/xfrm
parentdt-bindings: net: renesas,ravb: Add support for r8a774e1 SoC (diff)
downloadlinux-709a16be0593c08190982cfbdca6df95e6d5823b.tar.xz
linux-709a16be0593c08190982cfbdca6df95e6d5823b.zip
r8169: fix RTL8168f/RTL8411 EPHY config
Mistakenly bit 2 was set instead of bit 3 as in the vendor driver. Fixes: a7a92cf81589 ("r8169: sync PCIe PHY init with vendor driver 8.047.01") Signed-off-by: Heiner Kallweit <hkallweit1@gmail.com> Signed-off-by: David S. Miller <davem@davemloft.net>
Diffstat (limited to 'net/xfrm')
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