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| author | Chun-Hao Lin <hau@realtek.com> | 2014-12-10 14:28:38 +0100 |
|---|---|---|
| committer | David S. Miller <davem@davemloft.net> | 2014-12-12 03:38:52 +0100 |
| commit | 5fbea33740aeb948422d7b7e8aafbeac362264b2 (patch) | |
| tree | fa7c700c3171cd19c8f391b142b92ca3c2c77cab /net | |
| parent | net: dsa: bcm_sf2: force link for all fixed PHY devices (diff) | |
| download | linux-5fbea33740aeb948422d7b7e8aafbeac362264b2.tar.xz linux-5fbea33740aeb948422d7b7e8aafbeac362264b2.zip | |
r8169:update rtl8168g pcie ephy parameter
Add ephy parameter to rtl8168g.
Also change the common function of rtl8168g from "rtl_hw_start_8168g_1" to
"rtl_hw_start_8168g". And function "rtl_hw_start_8168g_1" is used for
setting rtl8168g hardware parameters.
Following is the explanation of what hardware parameter change for.
rtl8168g may erroneous judge the PCIe signal quality and show the error bit
on PCI configuration space when in PCIe low power mode.
The following ephy parameters are for above issue.
{ 0x00, 0x0000, 0x0008 }
{ 0x0c, 0x37d0, 0x0820 }
{ 0x1e, 0x0000, 0x0001 }
rtl8168g may return to PCIe L0 from PCIe L0s low power mode too slow.
The following ephy parameter is for above issue.
{ 0x19, 0x8000, 0x0000 }
Signed-off-by: Chunhao Lin <hau@realtek.com>
Signed-off-by: David S. Miller <davem@davemloft.net>
Diffstat (limited to '')
0 files changed, 0 insertions, 0 deletions