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| author | Nicolas Pitre <nicolas.pitre@linaro.org> | 2012-05-03 02:56:52 +0200 |
|---|---|---|
| committer | Nicolas Pitre <nicolas.pitre@linaro.org> | 2013-05-29 21:50:34 +0200 |
| commit | 1e904e1bf6f1285cc2dd5696c44b7cf78cda643f (patch) | |
| tree | 960d3d6b28b2a6097da4806b1059f55d4fa263ad /net | |
| parent | ARM: introduce common set_auxcr/get_auxcr functions (diff) | |
| download | linux-1e904e1bf6f1285cc2dd5696c44b7cf78cda643f.tar.xz linux-1e904e1bf6f1285cc2dd5696c44b7cf78cda643f.zip | |
ARM: vexpress: introduce DCSCB support
This adds basic CPU and cluster reset controls on RTSM for the
A15x4-A7x4 model configuration using the Dual Cluster System
Configuration Block (DCSCB).
The cache coherency interconnect (CCI) is not handled yet.
Signed-off-by: Nicolas Pitre <nico@linaro.org>
Reviewed-by: Santosh Shilimkar <santosh.shilimkar@ti.com>
Acked-by: Pawel Moll <pawel.moll@arm.com>
Diffstat (limited to 'net')
0 files changed, 0 insertions, 0 deletions