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authorJiaxun Yang <jiaxun.yang@flygoat.com>2020-05-28 17:27:49 +0200
committerMarc Zyngier <maz@kernel.org>2020-05-29 10:42:18 +0200
commit818e915fbac518e8c78e1877a0048d92d4965e5a (patch)
treef968276a5bf2203bffb46a5d351307aee5a3f630 /scripts/extract_xc3028.pl
parentirqchip/sifive-plic: Improve boot prints for multiple PLIC instances (diff)
downloadlinux-818e915fbac518e8c78e1877a0048d92d4965e5a.tar.xz
linux-818e915fbac518e8c78e1877a0048d92d4965e5a.zip
irqchip: Add Loongson HyperTransport Vector support
This controller appears on Loongson-3 chips for receiving interrupt vectors from PCH's PIC and PCH's PCIe MSI interrupts. Signed-off-by: Jiaxun Yang <jiaxun.yang@flygoat.com> Signed-off-by: Marc Zyngier <maz@kernel.org> Link: https://lore.kernel.org/r/20200528152757.1028711-2-jiaxun.yang@flygoat.com
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