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| author | Christoffer Dall <christoffer.dall@linaro.org> | 2017-03-18 13:56:56 +0100 |
|---|---|---|
| committer | Christoffer Dall <cdall@linaro.org> | 2017-04-04 14:33:58 +0200 |
| commit | 5b0d2cc2805897c14257f6dbb949639c499c3c25 (patch) | |
| tree | b9cf3a2d817ef80a8aeface5563e7d256c38daed /scripts/markup_oops.pl | |
| parent | kvm: arm/arm64: Fix locking for kvm_free_stage2_pgd (diff) | |
| download | linux-5b0d2cc2805897c14257f6dbb949639c499c3c25.tar.xz linux-5b0d2cc2805897c14257f6dbb949639c499c3c25.zip | |
KVM: arm64: Ensure LRs are clear when they should be
We currently have some code to clear the list registers on GICv3, but we
never call this code, because the caller got nuked when removing the old
vgic. We also used to have a similar GICv2 part, but that got lost in
the process too.
Let's reintroduce the logic for GICv2 and call the logic when we
initialize the use of hypervisors on the CPU, for example when first
loading KVM or when exiting a low power state.
Reviewed-by: Marc Zyngier <marc.zyngier@arm.com>
Signed-off-by: Christoffer Dall <christoffer.dall@linaro.org>
Signed-off-by: Marc Zyngier <marc.zyngier@arm.com>
Diffstat (limited to 'scripts/markup_oops.pl')
0 files changed, 0 insertions, 0 deletions