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| author | Priit Laes <plaes@plaes.org> | 2017-03-02 21:55:27 +0100 |
|---|---|---|
| committer | Maxime Ripard <maxime.ripard@free-electrons.com> | 2017-03-06 10:25:56 +0100 |
| commit | b0f0daa8fe9e74b85f6360288d38224ad1c2f2f4 (patch) | |
| tree | 1f0b619bb03802fdfd07dd854b3c11f6973e5b81 /scripts/stackusage | |
| parent | clk: sunxi-ng: tighten SoC deps on explicit AllWinner SoCs (diff) | |
| download | linux-b0f0daa8fe9e74b85f6360288d38224ad1c2f2f4.tar.xz linux-b0f0daa8fe9e74b85f6360288d38224ad1c2f2f4.zip | |
clk: sunxi-ng: sun5i: Fix mux width for csi clock
Mux for CSI clock is 3 bits, not 2.
Signed-off-by: Priit Laes <plaes@plaes.org>
Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
Diffstat (limited to 'scripts/stackusage')
0 files changed, 0 insertions, 0 deletions