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author | Miguel Ojeda <ojeda@kernel.org> | 2024-04-09 19:25:16 +0200 |
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committer | Palmer Dabbelt <palmer@rivosinc.com> | 2024-04-28 23:50:34 +0200 |
commit | 70a57b247251aabadd67795c3097c0fcc616e533 (patch) | |
tree | 67d97ccdefffbbf84a4ba3cb750739ac25cba0a5 /scripts | |
parent | Merge patch series "Rework & improve riscv cmpxchg.h and atomic.h" (diff) | |
download | linux-70a57b247251aabadd67795c3097c0fcc616e533.tar.xz linux-70a57b247251aabadd67795c3097c0fcc616e533.zip |
RISC-V: enable building 64-bit kernels with rust support
The rust modules work on 64-bit RISC-V, with no twiddling required.
Select HAVE_RUST and provide the required flags to kbuild so that the
modules can be used. The Makefile and Kconfig changes are lifted from
work done by Miguel in the Rust-for-Linux tree, hence his authorship.
Following the rabbit hole, the Makefile changes originated in a script,
created based on config files originally added by Gary, hence his
co-authorship.
32-bit is broken in core rust code, so support is limited to 64-bit:
ld.lld: error: undefined symbol: __udivdi3
As 64-bit RISC-V is now supported, add it to the arch support table.
Co-developed-by: Gary Guo <gary@garyguo.net>
Signed-off-by: Gary Guo <gary@garyguo.net>
Signed-off-by: Miguel Ojeda <ojeda@kernel.org>
Co-developed-by: Conor Dooley <conor.dooley@microchip.com>
Signed-off-by: Conor Dooley <conor.dooley@microchip.com>
Link: https://lore.kernel.org/r/20240409-silencer-book-ce1320f06aab@spud
Signed-off-by: Palmer Dabbelt <palmer@rivosinc.com>
Diffstat (limited to 'scripts')
-rw-r--r-- | scripts/generate_rust_target.rs | 6 |
1 files changed, 6 insertions, 0 deletions
diff --git a/scripts/generate_rust_target.rs b/scripts/generate_rust_target.rs index 54919cf48621..8f7846b9029a 100644 --- a/scripts/generate_rust_target.rs +++ b/scripts/generate_rust_target.rs @@ -150,6 +150,12 @@ fn main() { // `llvm-target`s are taken from `scripts/Makefile.clang`. if cfg.has("ARM64") { panic!("arm64 uses the builtin rustc aarch64-unknown-none target"); + } else if cfg.has("RISCV") { + if cfg.has("64BIT") { + panic!("64-bit RISC-V uses the builtin rustc riscv64-unknown-none-elf target"); + } else { + panic!("32-bit RISC-V is an unsupported architecture"); + } } else if cfg.has("X86_64") { ts.push("arch", "x86_64"); ts.push( |