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authorLinus Torvalds <torvalds@linux-foundation.org>2021-09-11 23:29:42 +0200
committerLinus Torvalds <torvalds@linux-foundation.org>2021-09-11 23:29:42 +0200
commitb79bd0d5102b4a3ea908018fda6b84a4c8fd6235 (patch)
treea89451ff3def42608166bd4fc969ace7f582ce91 /scripts
parentMerge branch 'for-5.15' of git://git.kernel.org/pub/scm/linux/kernel/git/jlaw... (diff)
parentriscv: Move EXCEPTION_TABLE to RO_DATA segment (diff)
downloadlinux-b79bd0d5102b4a3ea908018fda6b84a4c8fd6235.tar.xz
linux-b79bd0d5102b4a3ea908018fda6b84a4c8fd6235.zip
Merge tag 'riscv-for-linus-5.15-mw1' of git://git.kernel.org/pub/scm/linux/kernel/git/riscv/linux
Pull more RISC-V updates from Palmer Dabbelt: - A pair of defconfig additions, for NVMe and the EFI filesystem localization options. - A larger address space for stack randomization. - A cleanup to our install rules. - A DTS update for the Microchip Icicle board, to fix the serial console. - Support for build-time table sorting, which allows us to have __ex_table read-only. * tag 'riscv-for-linus-5.15-mw1' of git://git.kernel.org/pub/scm/linux/kernel/git/riscv/linux: riscv: Move EXCEPTION_TABLE to RO_DATA segment riscv: Enable BUILDTIME_TABLE_SORT riscv: dts: microchip: mpfs-icicle: Fix serial console riscv: move the (z)install rules to arch/riscv/Makefile riscv: Improve stack randomisation on RV64 riscv: defconfig: enable NLS_CODEPAGE_437, NLS_ISO8859_1 riscv: defconfig: enable BLK_DEV_NVME
Diffstat (limited to 'scripts')
-rw-r--r--scripts/sorttable.c1
1 files changed, 1 insertions, 0 deletions
diff --git a/scripts/sorttable.c b/scripts/sorttable.c
index 0ef3abfc4a51..f355869c65cd 100644
--- a/scripts/sorttable.c
+++ b/scripts/sorttable.c
@@ -349,6 +349,7 @@ static int do_file(char const *const fname, void *addr)
case EM_ARM:
case EM_MICROBLAZE:
case EM_MIPS:
+ case EM_RISCV:
case EM_XTENSA:
break;
default: