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authorKunihiko Hayashi <hayashi.kunihiko@socionext.com>2018-03-30 11:44:43 +0200
committerPhilipp Zabel <p.zabel@pengutronix.de>2018-04-27 11:55:59 +0200
commitfdc0f235d19492e64914ee60bb93a34d063a319b (patch)
treec19b3eb2f2988bd6f24d7ca74e79f372c8f4623a /security/commoncap.c
parentreset: uniphier: fix USB clock line for LD20 (diff)
downloadlinux-fdc0f235d19492e64914ee60bb93a34d063a319b.tar.xz
linux-fdc0f235d19492e64914ee60bb93a34d063a319b.zip
reset: uniphier: add PCIe reset control support
Add reset lines for PCIe controller on UniPhier SoCs. This adds support for Pro5, LD20 and PXs3. Signed-off-by: Kunihiko Hayashi <hayashi.kunihiko@socionext.com> Acked-by: Masahiro Yamada <yamada.masahiro@socionext.com> Signed-off-by: Philipp Zabel <p.zabel@pengutronix.de>
Diffstat (limited to 'security/commoncap.c')
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