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author | Clemens Ladisch <clemens@ladisch.de> | 2012-01-08 22:18:00 +0100 |
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committer | Clemens Ladisch <clemens@ladisch.de> | 2013-10-20 22:07:57 +0200 |
commit | 61b8cf0222b256b4f793d99c8bdc9b216d067a76 (patch) | |
tree | 5725c73801dde6ab4f2892b72f3d3d5338eb7d6d /sound/firewire/dice-interface.h | |
parent | ALSA: dice: add a proc file to show device information (diff) | |
download | linux-61b8cf0222b256b4f793d99c8bdc9b216d067a76.tar.xz linux-61b8cf0222b256b4f793d99c8bdc9b216d067a76.zip |
ALSA: dice: document quadlet alignment
Doing accesses without quadlet alignment is a bad idea because the
firmware's byte-swapping would garble the data; clarify this in the
documentation.
Signed-off-by: Clemens Ladisch <clemens@ladisch.de>
Diffstat (limited to 'sound/firewire/dice-interface.h')
-rw-r--r-- | sound/firewire/dice-interface.h | 6 |
1 files changed, 3 insertions, 3 deletions
diff --git a/sound/firewire/dice-interface.h b/sound/firewire/dice-interface.h index af916b9d07a4..27b044f84c81 100644 --- a/sound/firewire/dice-interface.h +++ b/sound/firewire/dice-interface.h @@ -7,9 +7,9 @@ /* * Generally, all registers can be read like memory, i.e., with quadlet read or - * block read transactions with any alignment or length. Writes are not - * allowed except where noted; quadlet-sized registers must be written with - * a quadlet write transaction. + * block read transactions with at least quadlet-aligned offset and length. + * Writes are not allowed except where noted; quadlet-sized registers must be + * written with a quadlet write transaction. * * All values are in big endian. The DICE firmware runs on a little-endian CPU * and just byte-swaps _all_ quadlets on the bus, so values without endianness |