diff options
| author | Jianqun Xu <jay.xu@rock-chips.com> | 2016-11-03 04:38:53 +0100 |
|---|---|---|
| committer | Heiko Stuebner <heiko@sntech.de> | 2016-11-05 23:12:55 +0100 |
| commit | 161baaea7c34e5b91174d994b82570ef0555eb1d (patch) | |
| tree | 789aea1f7fbb489d32a5f966179c7770e9460216 /sound/firewire | |
| parent | clk: rockchip: add 400MHz to rk3066 clock rates table (diff) | |
| download | linux-161baaea7c34e5b91174d994b82570ef0555eb1d.tar.xz linux-161baaea7c34e5b91174d994b82570ef0555eb1d.zip | |
clk: rockchip: remove more CLK_IGNORE_UNUSED for rk3399 clocktree
Optimize rk3399 clocktree by removing CLK_IGNORE_UNUSED of some clocks.
clocks will managered by usb:
- clk_usbphy0_480m_src
- clk_usbphy1_480m_src
- clk_usbphy_480m
clocks will be managered by pvtm:
- clk_pvtm_core_l
- clk_pvtm_core_b
- clk_pvtm_ddr
clocks will be managered by dfi:
- pclk_ddr_mon
- clk_dfimon0_timer
- clk_dfimon1_timer
- aclk_dcf
- pclk_dcf
Signed-off-by: Jianqun Xu <jay.xu@rock-chips.com>
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
Diffstat (limited to 'sound/firewire')
0 files changed, 0 insertions, 0 deletions