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authorLey Foon Tan <ley.foon.tan@intel.com>2019-04-24 06:57:14 +0200
committerLorenzo Pieralisi <lorenzo.pieralisi@arm.com>2019-05-30 16:28:01 +0200
commitec15c4d0d5d2e431169fbdf6c6bcf0c8ff71ef22 (patch)
treebd01cf8a894bb339051716fd86ab5c14ff783be2 /sound/firewire
parentLinux 5.2-rc1 (diff)
downloadlinux-ec15c4d0d5d2e431169fbdf6c6bcf0c8ff71ef22.tar.xz
linux-ec15c4d0d5d2e431169fbdf6c6bcf0c8ff71ef22.zip
PCI: altera: Allow building as module
Altera PCIe Rootport IP is a soft IP and is only available after an FPGA image (whose design contains it) is programmed. Make driver modulable to support use cases when FPGA image is programmed after the kernel has booted, so that the driver can be loaded upon request. Signed-off-by: Ley Foon Tan <ley.foon.tan@intel.com> Signed-off-by: Lorenzo Pieralisi <lorenzo.pieralisi@arm.com>
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