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| author | Tomi Valkeinen <tomi.valkeinen@ti.com> | 2014-03-24 12:01:52 +0100 |
|---|---|---|
| committer | Paul Walmsley <paul@pwsan.com> | 2014-04-11 20:29:09 +0200 |
| commit | 8e4cb9aac2ada7f8a986606703c34e2d573bb876 (patch) | |
| tree | de9f5ee073353e9253df9dcaa91145254fbe45cc /sound/oss/CHANGELOG | |
| parent | ARM: OMAP3: hwmod data: Correct clock domains for USB modules (diff) | |
| download | linux-8e4cb9aac2ada7f8a986606703c34e2d573bb876.tar.xz linux-8e4cb9aac2ada7f8a986606703c34e2d573bb876.zip | |
ARM: AM43xx: fix dpll init in bypass mode
On AM43xx, if a PLL is in bypass at kernel init, the code in
omap2_get_dpll_rate() will not realize this and will try to calculate
the clock rate using the multiplier and the divider, resulting in
errors.
omap2_init_dpll_parent() has similar issue.
Add the missing soc_is_am43xx() check to make the code work on AM43xx.
Signed-off-by: Tomi Valkeinen <tomi.valkeinen@ti.com>
Signed-off-by: Sathya Prakash M R <sathyap@ti.com>
Signed-off-by: Paul Walmsley <paul@pwsan.com>
Diffstat (limited to 'sound/oss/CHANGELOG')
0 files changed, 0 insertions, 0 deletions