diff options
| author | James Courtier-Dutton <James@superbug.co.uk> | 2007-11-04 15:08:26 +0100 |
|---|---|---|
| committer | Mercurial server <hg@alsa0.alsa-project.org> | 2008-01-31 17:30:24 +0100 |
| commit | 190d2c46e52592ba092e8bf8acd4427c920f2d69 (patch) | |
| tree | bc4f4271f08aa57ac520fa2536c3990f8741fd55 /sound/pci/emu10k1/io.c | |
| parent | [ALSA] emu10k1: Add comments regarding E-Mu ins and outs. (diff) | |
| download | linux-190d2c46e52592ba092e8bf8acd4427c920f2d69.tar.xz linux-190d2c46e52592ba092e8bf8acd4427c920f2d69.zip | |
[ALSA] snd:emu10k1: E-Mu updates. Fixes to firmware loading and support for 0404.
Signed-off-by: James Courtier-Dutton <James@superbug.co.uk>
Signed-off-by: Jaroslav Kysela <perex@perex.cz>
Diffstat (limited to 'sound/pci/emu10k1/io.c')
| -rw-r--r-- | sound/pci/emu10k1/io.c | 7 |
1 files changed, 7 insertions, 0 deletions
diff --git a/sound/pci/emu10k1/io.c b/sound/pci/emu10k1/io.c index 2862e17446fe..a02638350a0a 100644 --- a/sound/pci/emu10k1/io.c +++ b/sound/pci/emu10k1/io.c @@ -227,11 +227,14 @@ int snd_emu10k1_i2c_write(struct snd_emu10k1 *emu, int snd_emu1010_fpga_write(struct snd_emu10k1 * emu, u32 reg, u32 value) { + unsigned long flags; + if (reg > 0x3f) return 1; reg += 0x40; /* 0x40 upwards are registers. */ if (value < 0 || value > 0x3f) /* 0 to 0x3f are values */ return 1; + spin_lock_irqsave(&emu->emu_lock, flags); outl(reg, emu->port + A_IOCFG); udelay(10); outl(reg | 0x80, emu->port + A_IOCFG); /* High bit clocks the value into the fpga. */ @@ -239,20 +242,24 @@ int snd_emu1010_fpga_write(struct snd_emu10k1 * emu, u32 reg, u32 value) outl(value, emu->port + A_IOCFG); udelay(10); outl(value | 0x80 , emu->port + A_IOCFG); /* High bit clocks the value into the fpga. */ + spin_unlock_irqrestore(&emu->emu_lock, flags); return 0; } int snd_emu1010_fpga_read(struct snd_emu10k1 * emu, u32 reg, u32 *value) { + unsigned long flags; if (reg > 0x3f) return 1; reg += 0x40; /* 0x40 upwards are registers. */ + spin_lock_irqsave(&emu->emu_lock, flags); outl(reg, emu->port + A_IOCFG); udelay(10); outl(reg | 0x80, emu->port + A_IOCFG); /* High bit clocks the value into the fpga. */ udelay(10); *value = ((inl(emu->port + A_IOCFG) >> 8) & 0x7f); + spin_unlock_irqrestore(&emu->emu_lock, flags); return 0; } |