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authorDavid S. Miller <davem@davemloft.net>2019-06-07 01:24:30 +0200
committerDavid S. Miller <davem@davemloft.net>2019-06-07 01:24:30 +0200
commit96524ea4be04683bb3ad8ebaedcbe3a6e34302de (patch)
tree1aa7e943c5d445b4eb21299ea3e3871a8027b59c /sound/pci/ice1712/se.c
parentnet: stmmac: socfpga: fix phy and ptp_ref setup for Arria10/Stratix10 (diff)
parentnet: axienet: convert to phylink API (diff)
downloadlinux-96524ea4be04683bb3ad8ebaedcbe3a6e34302de.tar.xz
linux-96524ea4be04683bb3ad8ebaedcbe3a6e34302de.zip
Merge branch 'Xilinx-axienet-driver-updates'
Robert Hancock says: ==================== Xilinx axienet driver updates (v5) This is a series of enhancements and bug fixes in order to get the mainline version of this driver into a more generally usable state, including on x86 or ARM platforms. It also converts the driver to use the phylink API in order to provide support for SFP modules. Changes since v4: -Use reverse christmas tree variable order ==================== Signed-off-by: David S. Miller <davem@davemloft.net>
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